Traditionally, polysilicon layers have been used for the gates of transistors or as interconnect layers. In order to reduce the high resistance of polysilicon, doped polysilicon is sometimes used in those applications. However, even though the sheet resistance of doped polysilicon is reduced, it is still higher than desired, i.e., between 20 and 40 ohm/square. When the doped polysilicon is used as a long distance conductor, the polysilicon wire can represent a significant delay in transmission.
One method to improve the sheet resistance of doped polysilicon in gate applications that does not require additional processing steps, i.e. does not require additional masking steps is to reduce the polysilicon resistance by combining it with a refractory metal. In recent years, metal silicide films such as tungsten silicide and titanium silicide have been used to replace doped polysilicon films as the gate in MOSFET integrated circuits. The driving force behind this change is the need to reduce the resistivity of the polysilicon gate which in turn reduces the RC time constant of signal propagation. A much improved sheet resistance in the order of 1 to 5 ohm/square may be obtained. The process is frequently called the silicide gate approach. Silicides are mechanically strong and can be dry etched in plasma reactors. One of the more frequently used silicide, tantalum silicide is stable throughout standard processing temperatures and has the advantage that it can be retrofitted into existing fabrication processes. Silicide can also be used in a sandwiched structure of polysilicon commonly known as a polycide approach. The net effect of using a silicide gate is to reduce the second layer interconnect resistance and to allow the gate to be used as a moderate long-distance interconnect. Silicide is increasingly used in semiconductor fabrication processes to reduce the resistance of both gate and source/drain conductors.
Silicide formation between a silicon and a refractory metal can be accomplished by several means. For instance, silicides can be formed by depositing a refractory metal layer on an existing polysilicon layer and then forming a silicide at its interface by annealing the two layers together at a sufficiently high temperature. Another method of forming silicides is to deposit the silicide through sputter deposition from a refractory metal silicide target. Still another method of forming silicides is the use of a chemical vapor deposition technique utilizing gaseous reactants that contain both the refractory metal and the silicon.
A conventional method for producing silicide films is shown in FIGS. 1A through 1D. On a silicon substrate 10, a layer of polysilicon 12 is first deposited and patterned as shown in FIG. 1A. Outside spacers 14 are then formed and a thin oxide layer 16 is grown in the active source/drain areas as shown in FIG. 1B. A refractory metal 18 such as titanium or tungsten which will subsequently form the silicide is then deposited on top of the oxide. Upon heating in a reducing environment, the metal reacts with the exposed silicon to form a stoichiometric silicide such as TiSi.sub.2 or WSi.sub.2 as shown in FIG. 1C. The metal 18 does not react where it is in contact with silicon dioxide and is removed in an etching process which etches the metal but not the silicide. This is shown in FIG. 1D. In this method, the silicide formed is stoichiometric and has a thickness that is determined by the available amount of the reactants, i.e., either the silicon thickness or more commonly the thickness of the deposited metal layer. This forms a silicide composed entirely of a single stoichiometry. The drawbacks of this method is that the metal silicide formed may have undesirable side effects such as typically, high stress, poor oxidation resistance, poor etchability and high contact resistance with other materials.
It is therefore an object of the present invention to provide a multi-layer gate structure and a method of such preparation for a MOS type semiconductor device that does not have the shortcomings and drawbacks of the prior art silicide gate structure or method of preparation.
It is another object of the present invention to provide a multi-layer silicide gate structure for a MOS type semiconductor device and a method of preparation that involves at least two deposition steps of refractory metal silicide wherein the stoichometry of each layer is different from the other.
It is a further object of the present invention to provide a multi-layer silicide gate structure for a MOS type semiconductor device and a method of such preparation that involves the deposition of a first refractory metal silicide layer that has a first stoichometry, and the deposition of a second refractory metal silicide layer that has a second stoichometry different than the first stoichometry.
It is another further object of the present invention to provide a multi-layer silicide gate structure for a MOS type semiconductor device and a method of such preparation that can be carried out on a silicon substrate in a chemical vapor deposition process.
It is yet another object of the present invention to provide a method of forming a multi-layer silicide gate structure for a MOS type semiconductor device and a method of such preparation where the refractory metal used is tungsten, titanium, tantalum and molydenum.
It is still another object of the present invention to provide a multi-layer silicide gate structure for a MOSFET device and a method of such preparation by a chemical vapor deposition process wherein a reactant gas of SiH.sub.4 or SiCl.sub.2 H.sub.2 is used.